A semiconductor package includes a plurality of chips which are stacked with each other. Generally, a base chip which is the lowermost chip of the stacked chips may serve to perform external communication with the rest chips (hereinafter, referred to as core chips). The base chip may generate a control signal for controlling a plurality of core chips in response to a command received the like from an external device, and transmit the control signal to each core chip through a through silicon via (TSV). The control signal may be, for example, a control signal for an active operation, a precharge operation, a refresh operation, a read operation and a write operation.
Each core chip may include a plurality of memory banks, and each memory bank may include a plurality of word lines. Accessing or refreshing a memory bank consumes a lot of power. As the number of memory banks included in each core chip is increased, the power consumed for generating a control signal, and transmitting the control signal to each core chip, and active-precharging a word line is inevitably increased.